a) Proposed 2D spiral Vernier ring TDC with 2 nd order ΣΔ... | Download Scientific Diagram
An accurate time-to-digital converter based on a self-timed ring oscillator for on-the-fly time measurement | SpringerLink
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Figure 11 from A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping | Semantic Scholar
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Figure 3 from An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages | Semantic Scholar
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Concept of the gated ring oscillator TDC. | Download Scientific Diagram
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Figure 5 from A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping | Semantic Scholar
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GRO‐TDC with gate‐switch‐based delay cell halving resolution limit - Park - 2017 - International Journal of Circuit Theory and Applications - Wiley Online Library
![Gated Ring Oscillator Based TDC [3] | Download Scientific Diagram](https://www.researchgate.net/publication/273163361/figure/fig1/AS:393477943775247@1470823860920/Gated-Ring-Oscillator-Based-TDC-3.png "Gated Ring Oscillator Based TDC [3] | Download Scientific Diagram")
Gated Ring Oscillator Based TDC [3] | Download Scientific Diagram
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Concept of a multipath gated ring oscillator TDC. | Download Scientific Diagram
Figure 3 from A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology | Semantic Scholar
Electronics | Free Full-Text | Radiation Assessment of a 15.6ps Single-Shot Time-to-Digital Converter in Terms of TID | HTML
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Concept of the gated ring oscillator TDC. | Download Scientific Diagram
Figure 8 from An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages | Semantic Scholar
